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JFET biasing 419
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23-3 At A, depletion region (solid area) is not wide, and many charge carriers (arrows) flow. At B, depletion region is wider, channel is narrower, and fewer carriers flow. At C, channel is completely obstructed, and no carriers flow.
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the depletion region will completely obstruct the flow of charge carriers. This is called pinchoff, and is illustrated at C. Again, think of the garden-hose analogy. More negative gate voltages, EG, correspond to stepping harder and harder on the hose. When pinchoff takes place, you ve cut off the water flow entirely, perhaps by bearing down with all your weight on one foot! Biasing beyond pinchoff is something like loading yourself up with heavy weights as you balance on the hose, thereby shutting off the water flow with extra force.
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Two biasing arrangements for an N-channel JFET are shown in Fig. 23-4. These hookups are similar to the way an NPN bipolar transistor is connected, except that the source-gate (SG) junction is not forward-biased. At A, the gate is grounded through resistor R2. The source resistor, R1, limits the current through the JFET. The drain current, ID, flows through R3, producing a voltage across this resistor. The ac output signal passes through C2. At B, the gate is connected to a voltage that is negative with respect to ground through potentiometer R2. Adjusting this potentiometer results in a variable negative EG between R2 and R3. Resistor R1 limits the current through the JFET. The drain current, ID, flows through R4, producing a voltage across it; the ac output signal passes through C2. In both of these circuits, the drain is positive relative to ground. For a P-channel JFET, reverse the polarities in Fig. 23-4. The connections are somewhat similar to the way a PNP bipolar transistor is used, except the SG junction isn t forward-biased.
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23-4 Two methods of biasing an N-channel JFET. At A, fixed gate bias; at B, variable gate bias.
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Typical JFET power-supply voltages are comparable to those with bipolar transistors. The voltage between the source and drain, abbreviated ED, can range from about 3 V to 150 V; most often it is 6 V to 12 V. The biasing arrangement in Fig. 23-4A is commonly used for weak-signal amplifiers, low-level amplifiers and oscillators. The scheme at B is more often employed in power amplifiers having a substantial input signal.
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The graph of Fig. 23-5 shows the drain (channel) current, ID, as a function of the gate bias voltage, EG, for a hypothetical N-channel JFET. The drain voltage, ED, is assumed to be constant.
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Drain current versus drain voltage 421
23-5 Relative drain current as a function of gate voltage for a hypothetical N-channel JFET.
When EG is fairly large and negative, the JFET is pinched off, and no current flows through the channel. As EG gets less negative, the channel opens up, and current begins flowing. As EG gets still less negative, the channel gets wider and the current ID increases. As EG approaches the point where the SG junction is at forward breakover, the channel conducts as well as it possibly can. If EG becomes positive enough so that the SG junction conducts, the JFET will no longer work properly. Some of the current in the channel will then be shunted off through the gate, a situation that is never desired in a JFET. The hose will spring a leak! The best amplification for weak signals is obtained when the gate bias, EG, is such that the slope of the curve in Fig. 23-5 is the greatest. This is shown roughly by the range marked X in the figure. For power amplification, however, results are often best when the JFET is biased at, or even beyond, pinchoff, in the range marked Y. The current ID passes through the drain resistor, as shown in either diagram of Fig. 23-4. Small fluctuations in EG cause large changes in ID, and these variations in turn produce wide swings in the dc voltage across R3 (at A) or R4 (at B). The ac part of this voltage goes through capacitor C2, and appears at the output as a signal of much greater ac voltage than that of the input signal at the gate. That s voltage amplification.
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